1. Field of the Invention
The present invention relates to sigma-delta modulators, and in particular, to sigma-delta modulators used for converting root-mean-square (RMS) signal values to direct current (DC) signals.
2. Related Art
The Sigma-Delta (ΣΔ) modulator is an electronic system that generates a digital output at very high resolution within a narrow bandwidth. The analog input is oversampled at a sampling rate (fS) much larger than the required Nyquist rate (fN), and it is coded as a bitstream with reduced number of (M) bits. As illustrated by FIG. 1, it contains a lowpass loop filter (LPF) and a coarse M-bit analog-to-digital converter (ADC) in the feedforward path (quantizer), and a digital-to-analog converter (DAC) in the feedback path. In order to produce a Nyquist rate output, the modulator is generally followed by a digital decimator. The decimator also filters the high-frequency noise and increases the length of the output digital word. The combination of a ΣΔ modulator with a digital decimation filter is named ΣΔ ADC. It is used in a large range of applications that require high resolution in a limited bandwidth, such as sensor interfaces, digital telecommunication receivers, precision applications and dc measurements.
The principle of operation of a ΣΔ modulator is better understood with the aid of a linearized model, depicted in FIG. 2. In this Laplace-domain model, L(s) is the loop filter transfer function and the feedback factor b express the ratio between ADC and DAC reference voltages. The analog-to-digital conversion of the loop filter output U(s) is modeled as an addition of quantization error Q(s). When a multi-bit quantizer is employed, the quantization error can be assumed to be a white noise source with a flat power spectrum density (PSD). The total quantization noise power (qRMS2) is independent of fS, and it is given by:
                              q                      R            ⁢                                                  ⁢            M            ⁢                                                  ⁢            S                    2                =                                            Δ              2                        12                    =                                    V              REF              2                                      12              ·                                                (                                                            2                      M                                        -                    1                                    )                                2                                                                        (        1        )            
The modulator output Y(s) can be expressed as:
                              Y          ⁡                      (            s            )                          =                                            1                              1                +                                  bL                  ⁡                                      (                    s                    )                                                                        ·                          Q              ⁡                              (                s                )                                              +                                                    L                ⁡                                  (                  s                  )                                                            1                +                                  bL                  ⁡                                      (                    s                    )                                                                        ·                          X              ⁡                              (                s                )                                                                        (        2        )            where the term multiplying Q(s) is the noise transfer function (NTF), and the term multiplying X(s) is the signal transfer function (STF). When L(s) is a lowpass transfer function with very high DC gain, the STF is lowpass transfer function with 1/b gain at low frequencies, while the NTF is a highpass transfer function. FIG. 3 shows the typical digital output spectrum of a ΣΔ modulator when the analog input X(s) is a band-limited (fB=fN/2) low-frequency signal.
At low frequencies, the modulator output contains an undistorted replica of the analog input while the quantization noise is strongly attenuated. If the spectral content of the modulator output containing most of the shaped quantization noise power (nRMS2) is filtered out in the digital domain, very high resolution analog-to-digital conversion is achieved. The shaped quantization noise power after digital filtering is given by:
                              n                      R            ⁢                                                  ⁢            M            ⁢                                                  ⁢            S                    2                =                                            q                              R                ⁢                                                                  ⁢                M                ⁢                                                                  ⁢                S                            2                                      f              S                                ·                                    ∫                              -                                  f                  B                                                            f                B                                      ⁢                                                                                                  1                                          1                      +                                              bL                        ⁡                                                  (                                                      2                            ⁢                                                                                                                  ⁢                            π                            ⁢                                                                                                                  ⁢                            f                                                    )                                                                                                                                      2                            ⁢                              ⅆ                f                                                                        (        3        )            
The noise shaping of the quantization errors and the digital filtering of the out-of-band noise are possible because fS>fN=2fB, i.e., the analog input is oversampled. The oversampling ratio (OSR) is defined as:OSR=fS/2fB   (4)
The simplest implementation of a ΣΔ modulator is achieved when the loop filter is a single integrator and a comparator is used as quantizer (FIG. 4). In this case, it is named single-bit first-order ΣΔ modulator and the digital output is a bitstream.
A multi-bit ΣΔ modulator is implemented if a multi-bit ADC is used as quantizer, and a multi-bit DAC is employed in the feedback path. High-order noise shaping is achieved when the loop filter contains two or more integrators. The loop filter of a bandpass ΣΔ modulator contains high-frequency resonator stages instead of integrators. The in-band shaped quantization noise power of an M-bit ΣΔ modulator implemented with a cascade of P integrators is generically expressed by:
                              n                      R            ⁢                                                  ⁢            M            ⁢                                                  ⁢            S                    2                =                                            V              REF              2                                      12              ·                                                (                                                            2                      M                                        -                    1                                    )                                2                                              ·                                    π                              2                ⁢                                                                  ⁢                P                                                                    (                                                      2                    ⁢                                                                                  ⁢                    P                                    +                  1                                )                            ·                              OSR                                                      2                    ⁢                    P                                    +                  1                                                                                        (        5        )            
RMS-to-DC converters are electronic circuits that generate a DC output signal (either current or voltage), proportional to the Root-Mean-Square value (the square-root of the power) of the input signal. Such devices are used in a variety of applications, such as test and measurement, and communications, were a measure of the signal strength is important. A specific property of RMS-to-DC converters is that their response is insensitive to the precise shape of the input signal; i.e., it is insensitive to crest factor variations. This especially important in applications were the converter input signals can attain multiple different formats (modulation parameters, variable coding, etc . . .).
FIG. 5 depicts a RMS-to-DC converter based on the “difference-of-squares” technique implemented with a forward path multiplier. In this configuration, a linear analog multiplier is used to generate the difference of the square of the input signal and the square of the output signal, i.e., Km(βx2x2−βy2y2). This is achieved by supplying one multiplier input with the sum of the input signal and the output signal, and the other input with the difference of these signals. The resulting difference-of-squares is then integrated, producing in the steady-state situation a dc level proportional to the true RMS value of the input signal. The integrator acts as a lowpass filter followed by an amplifier with high gain A. The lowpass filter removes the harmonics of the squared input signal, while the high gain forces the multiplier output to be zero. The relation between the converter DC output y and the RF input signal x(t) can be calculated based on the analysis of block diagram shown in FIG. 5:y=AKm[βx2 x(t)2−βy2y2]  (6)where Km is the multiplier conversion gain. The static transfer function of the difference-of-squares RMS-to-DC converter is obtained by solving (6):
                    y        =                                            -              1                                      2              ⁢                                                          ⁢                              AK                m                            ⁢                              β                y                2                                              +                                                    1                                                      (                                          2                      ⁢                                              AK                        m                                            ⁢                                              β                        y                        2                                                              )                                    2                                            +                                                                    β                    x                    2                                                        β                    y                    2                                                  ·                                                                            x                      ⁡                                              (                        t                        )                                                              2                                    _                                                                                        (        7        )            
When the dc gain A of the integrator approaches infinity, then the output signal y becomes proportional to the RMS value of the input signal x(t):
                                          lim                          A              ->              ∞                                ⁢          y                =                                            β              x                                      β              y                                ·                                                                      x                  ⁡                                      (                    t                    )                                                  2                            _                                                          (        8        )            
At the frequencies where the feedforward gain AKm is very high, the difference-of-squares RMS-to-DC converter static transfer is independent of the multiplier conversion gain and only determined by the scaling factors βx and βy.
A RMS-to-DC converter based on the difference-of-squares principles can also be implemented using two matched squaring circuits as described in FIG. 5A. In this case, the relation between the converter DC output y and the RF input signal x(t) can be expressed as:
                                          lim                          A              ->              ∞                                ⁢          y                =                                                            K                x                                            K                y                                      ·                                                            x                  ⁡                                      (                    t                    )                                                  2                            _                                                          (                  8          ⁢          A                )            where Kx and Ky are the gains of the squaring cells.